Logisim-evolution
Digital logic designer and simulator
com.github.reds.LogisimEvolutionLogisim-evolution is a completely free and open-source educational, cross-platform software for designing and simulating digital logic circuits.
Project highlights:
- easy to use circuit designer
- logic circuit simulations
- chronogram (to see the evolution of signals in your circuit)
- electronic board integration - schematics can now be simulated on real hardware
- VHDL components (components whose behavior is specified in VHDL!)
- TCL/TK console (interfaces between the circuit and the user)
- huge library of components (LEDs, TTLs, switches, SoCs)
- Supports multiple languages
- and more!
Screenshots
Observed history
| App | Change | Version | When ↓ |
|---|
No observed changes yet.
The initial import establishes a baseline. Future version changes will appear here.
Browse the app catalogue →Upstream releases
Release notes supplied by the developer. These dates are not Flathub package publication times.
5.0.012 Sept 2026
No release notes supplied.
4.1.015 Feb 2026
No release notes supplied.
4.0.07 Sept 2025
No release notes supplied.
3.9.015 Aug 2024
- Updated Java requirement to Java 21.
- Added an autosave feature along with preferences for it.
- Added a new preference to allow the user to choose the action keys for many functions.
- Changed RAM default output from error to undefined
- Added support for scanning 7-segment display on FPGA-boards
- Added first support for the openFpga toolchain for the ecp5 family
- Note that this is experimental for the moment, so use it at your own risk.
- Improved Chinese localization
- Changed language code from cn to zh.
- Chinese users (also including those who use other forks of Logisim that are using cn language code) will be required to manually modify language settings.
- Fixed select port positioning on Multiplexer to be more consistent in some cases
- Fixed appearance of LSe desktop icon
- Update controlled buffer behavior to pass U and E inputs while enabled
- Introduced user-defined color for components.
- Made component icons more uniform.
- Added architecture designation to macOS build.
- Fixed Karnaugh map color index bug.
- Attribute sheet now honors application color theme.
- Attribute sheet now displays HEX value of color properties.
- Added TTL 7487: 4-bit True/complement, zero/one elements
- Fixed Wrong HDL generation bug in the PortIO component and added the single bit version.
- Added TTL 74151: 8-line to 1 line data selector
- Added TTL 74153: dual 4-line to 1 line data selector
- Added TTL 74181: arithmetic logic unit
- Added TTL 74182: look-ahead carry generator
- Added TTL 74299: 8-bit universal shift register with three-state outputs
- Added TTL 74381: arithmetic logic unit
- Added TTL 74541: Octal buffers with three-state outputs
- Added TTL 74670: 4-by-4 register file with three-state outputs
- Added 16 bit floating point support for floating point arithmetic
- Fixed the problem of keys getting assigned to focusing on the cell of the table in "properties" section along with its actual intent